S. Matsumae and N. Tokura: Simulation Algorithms among Enhanced Mesh Models, IEICE Transactions on Information and Systems, Vol.E82-D, No.10, pp.1324-1337 (Oct. 1999).
S. Matsumae and N. Tokura: Simulating a Mesh with Separable Buses, Transactions of Information Processing Society of Japan, Vol.40, No.10, pp.3706-3714 (Oct. 1999).
F. Ooshita, S. Matsumae and T. Masuzawa: Scheduling for Gather Operation in Heterogeneous Parallel Computing Environments, IEICE Transactions on Fundamentals, vol.E86-A No.4, pp.908-918 (Apr. 2003).
S. Matsumae: Simulation of Meshes with Separable Buses by Meshes with Multiple Partitioned Buses, International Journal of Foundations of Computer Science (IJFCS), World Scientific, vol.15, No.3, pp.475-484 (June 2004).
S. Matsumae: An Efficient Scaling-Simulation Algorithm of Reconfigurable Meshes by Meshes with Statically Partitioned Buses, IEICE Transactions on Information and Systems, Vol.E88D, No.1, pp.82-88 (Jan. 2005).
永井,松前,都倉:教員の作業効率向上を目指した授業支援システムの構築と運用,工学教育 (Journal of Japan Society for Engineering Education), vol.53, no.2, pp.64-69 (Mar. 2005)
S. Matsumae: Tight Bounds on the Simulation of Meshes with Dynamically Reconfigurable Row/Column Buses by Meshes with Statically Partitioned Buses, Journal of Parallel and Distributed Computing, Elsevier, vol.66, issue 10, pp.1338-1346 (Oct. 2006)
F. Ooshita, S. Matsumae and T. Masuzawa: Scheduling for Independent-Task Applications on Heterogeneous Parallel Computing Environments under the Unidirectional One-Port Model, IEICE Transactions on Information and Systems, Vol.E90-D, No.2, pp.403-417 (Feb. 2007)
S. Matsumae: Energy-Efficient Cell Partition of 3D Space for Sensor Networks with Location Information, International Journal of Network Protocols and Algorithms, Vol.1, Issue 2, pp.85-98 (2010)
S. Matsumae: Impact of Reconfigurable Function on Meshes with Row/Column Buses, International Journal of Networking and Computing (IJNC), vol.1, no.1, pp.36-48 (Jan. 2011)
S. Matsumae: Effective Partitioning of Static Global Buses for Small Processor Arrays, Journal of Information Processing Systems, Vol.7, No.1, pp.85-92 (Mar. 2011)
S. Matsumae: Polylogarithmic Gap between Meshes with Reconfigurable Row/Column Buses and Meshes with Statically Partitioned Buses, International Journal of Advanced Computer Science and Applications, vol.3, No.2, pp.89-94 (Feb. 2012)
S. Matsumae and F. Ooshita: Hierarchical Low Power Consumption Technique with Location Information for Sensor Networks, International Journal of Advanced Computer Science and Applications, vol.4, No.4, pp.69-74 (May. 2013)
S. Matsumae and M. Miyazaki: Solving Dynamic Programming Problem by Pipeline Implementation on GPU, International Journal of Advanced Computer Science and Applications, Vol.9, No.12, pp.518-523 (Dec. 2018)
A. Matsumae, S. Matsumae and Y. Nagai: Dynamic Relationship Design of Knowledge Co-Creating Cluster: Traditional Japanese Architectural Industry, SN Applied Sciences (Springer Nature), 10.1007/s42452-020-2209-2 (Mar. 2020)
S. Matsumae: Accelerating Dynamic Programming by P-Fold Pipeline Implementation on GPU, International Journal of Computers and Their Applications, Vol.30, No.2, pp.121-129 (June 2023)
T.Honda, K.Takemura, S. Matsumae, N. Morita, W. Iwasaki, R. Arita, S. Ueda, Y.W. Liang, O. Fukuda, K. Kikunaga, S. Ohmagari: Quantification of caffeine in coffee cans using electrochemical measurements, machine learning, and boron-doped diamond electrodes, PLoS One. 2024 Mar 26;19(3):e0298331, doi:10.1371/journal.pone.0298331 (Mar. 2024)
国際会議(査読有り) / International Conference (refereed) †
S. Matsumae and N. Tokura: Simulating a Mesh with Separable Buses by a Mesh with Partitioned Buses, Proc. of 1999 International Symposium on Parallel Architectures, Algorithms and Networks (I-SPAN’99), pp.198-203, IEEE CS press (Freemantle, Australia, June 1999).
S. Matsumae and N. Tokura: An Efficient Self-Simulation Algorithm for Reconfigurable Meshes, Proc. of Twelfth Annual ACM Symposium on Parallel Algorithms and Architectures (SPAA2000), pp.216-223, ACM press (Bar Harbor, Maine, USA, July 2000).
F. Ooshita, S. Matsumae and T. Masuzawa: Efficient gather operation in heterogeneous cluster systems, Proc. of the 16th Annual International Symposium on High Performance Computing Systems and Applications (HPCS2002), pp.196-204, IEEE CS press (Moncton, NB, Canada, June 2002).
S. Matsumae: An Efficient Scaling-Simulation of a Mesh with Separable Buses by a Mesh with Partitioned Buses,Proc. of the international conference on Networks, Parallel and Distributed Processing, and Applications (NPDPA2002), pp.40-45, ACTA Press (Tsukuba, Japan, Oct. 2002).
S. Matsumae: Simulation of Meshes with Separable Buses by Meshes with Multiple Partitioned Buses, Proc. of the 17th International Parallel & Distributed Processing Symposium (IPDPS2003), IEEE CS Press (Nice, France, Apr. 2003).
S. Matsumae: An Efficient Scaling-Simulation of Reconfigurable Meshes by Meshes with Partitioned Buses, Proc. of the 17th International Parallel & Distributed Processing Symposium (IPDPS2003), IEEE CS Press (Nice, France, Apr. 2003).
S. Matsumae: Optimal Simulation of Meshes with Dynamically Separable Buses by Meshes with Statically Partitioned Buses, Proc. of the 2004 International Symposium on Parallel Architectures, Algorithms and Networks (I-SPAN’04), pp. 475-481, IEEE CS Press (Hong Kong, China, May 2004).
S. Matsumae: A Tight Bound for Scaling-Simulation Problem of Meshes with Separable Buses by Meshes with Partitioned Buses, Proc. of the 17th International Conference on Parallel and Distributed Computing Systems (PDCS-2004), pp.308-314 (San Francisco, CA, USA, Sept.15-17, 2004)
S. Matsumae: Influences of Communication Latency on the Scaling-Simulation of Meshes with Dynamically Reconfigurable Row/Column Buses, Proc. of the 4th Asia Pacific International Symposium on Information Technology (APIS2005), pp. 76-79, (Gold Coast, Australia, Jan. 26-27, 2005)
S. Matsumae: Scaling-Simulation of Linear Reconfigurable Meshes by Horizontal-Vertical Reconfigurable Meshes, Proc. of the 2005 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’05), pp. 533-539 (Las Vegas, USA, June 27-30, 2005)
S. Matsumae: Impact of Layered Buses on Scaling-Simulation of Reconfigurable Meshes, Proc. of the 2006 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’06), pp. 792-796 (Las Vegas, USA, June 26-29, 2006)
F. Ooshita, S. Matsumae and T. Masuzawa: Scheduling Independent Tasks on Heterogeneous Parallel Computing Environments Under the Unidirectional One-Port Model, Proc. of the 2006 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’06), pp. 690-696 (Las Vegas, USA, June 26-29, 2006)
S. Matsumae: Polylogarithmic Gap between Meshes with Dynamically Separable Buses and Meshes with Statically Partitioned Buses, Proc. of the 19th International Conference on Parallel and Distributed Computing Systems (PDCS-2006), pp.7-12 (San Francisco, CA USA, Sept. 20-22, 2006)
T. Ueta, Y. Sumi, N. Yabuki, S. Matsumae, Y. Fukumoto, T. Tsukutani, Y. Fukui: A Study on Contour Line and Internal Area Extraction Method by Using the Self-Organization Map, Proc. of the 2006 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2006), pp.685-688 (Yonago, Tottori, Japan, Dec. 12-15, 2006)
S. Matsumae: Impact of Reconfigurability on Meshes with Row/Column Buses, Proc. of the 2007 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA'07), pp.168-172, (Las Vegas, USA, June 25-28, 2007)
S. Matsumae and N. Miyazaki: Improving Hierarchical Power Saving Technique with Location Information for Sensor Networks, Proc. of the 2008 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA'08), pp.123-126 (Las Vegas, USA, July 14-17, 2008)
S. Matsumae: Hierarchical Low Power Consumption Technique with Location Information for Sensor Networks, Proc. of the IASTED International Conference on Communication Systems and Networks (CSN 2008) (Palma De Mallorca, Spain, Sept. 1-3, 2008)
S. Matsumae: Impact of Reconfigurability on Meshes with Separable Row/Column Buses, Proc. of the 2008 International Conference on Parallel and Distributed Computing and Communication Systems (PDCCS 2008), pp.183-186 (New Orleans, Louisiana, USA, Sept. 24-26, 2008)
S. Matsumae and F. Ooshita: Upper Bound on Cell Size for Hierarchical GAF, Proc. of the 8 th International Conference on Applications and Principles of Information Science (APIS2009), (Okinawa, Japan, Jan. 11-12, 2009)
S. Matsumae: Polylogarithmic Time Simulation of Reconfigurable Row/Column Buses by Static Buses, Proc. of the 12th Workshop on Advances on Parallel and Distributed Processing Symposium (APDCM 2010) (in conjunction with the IEEE International Parallel & Distributed Processing Symposium (IPDPS2010)) (Atlanta, Georgia, USA, Apr. 2010).
S. Matsumae: Efficient Partitioning of Static Buses for Processor Arrays of Small Size, Proc. of the 10th International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP2010), Lecture Note in Computer Science (LNCS), pp.186-192, Springer, (Busan, Korea, May 21-23, 2010).
K. Hozoji and S. Matsumae: Web-based Translation Support System for Group Reading, Proc of the 27th International Conference on Computers and Their Applications (CATA2012), (Las Vegas, Nevada, USA, Mar. 2012)
A. Matsumae, K. Burrow, S. Matsumae, P. Ratnayake, S. Saburoh: Application of the Business Model Canvas to a Multi-Cultural Community to Co-create a Business Model Innovation, Proc. of International Conference on Convergence Content (ICCC2012), pp.165-166, (Saga, Japan, Dec. 2012)
S. Matsumae: Effective Implementation of Dynamically Reconfigurable Buses by Statically Fixed Buses, Proc of the 28th International Conference on Computers and Their Applications (CATA2013), (Honolulu, Hawaii, USA, Mar. 4-6, 2013)
K.Nakano, S.Matsumae and Y.Ito: The Random Address Shift to Reduce the Memory Access Congestion on the Discrete Memory Machine, Proc. of the 1st International Symposium on Computing and Networking. ― Across Practical Development and Theoretical Research ― (CANDAR2013), (Matsuyama, Japan, Dec.4-6, 2013)
K.Nakano and S.Matsumae: The Super Warp Architecture with Random Address Shift, Proc. of IEEE International Conference on High Performance Computing (HiPC 2013), (Bangalore, India, Dec. 18-21, 2013)
K.Nakano, S.Matsumae, and Y.Ito: Random Address Permute-Shift Technique for the Shared Memory on GPUs, International Conference on Parallel Processing Workshops, pp. 429-438, 2014
T. Uchida, A. Matsumae, and S. Matsumae: Web-Based Virtual Whiteboard Sharing System for Middle and High School, Proc. of International Conference on Computers and Their Applications 2015 (CATA2015), (Honolulu, Hawaii, USA, Mar. 9-11, 2015)
S. Matsumae, T. Nakayama, and A. Matsumae: EPUB Editor for Making Language Teaching Materials, Proc. of International Conference on Computers and Their Applications 2015 (CATA2015), (Honolulu, Hawaii, USA, Mar. 9-11, 2015)
Akane Matsumae, Sanjee Udari Samaranaye, Saliya de Silva, Takatoshi Nakamura, Yoshiaki Hori, Masanori Matsuzaki, Kazuhito Kitamura, Susumu Matsumae: "Knowledge Co-Creation Involving Diverse Stakeholders beyond Boarders: Entrepreneurship Education Based on Design Thinking Methodology", The Fourth Conference on Sri Lanka-Japan collaborative research, Sri Lanka-Japan Study Centre, Peradeniya University, 2016.8
Makoto Miyazaki and Susumu Matsumae: Improving Multiple Precision Integer Multiplication on GPUs, International Workshop on GPU Computing and Applications (in conjunction with CANDAR'17), (Aomori, Japan, Nov.19-22, 2017)
Makoto Miyazaki and Susumu Matsumae: A Pipeline Implementation for Dynamic Programming on GPU, International Workshop on Parallel and Distributed Algorithms and Applications (PDAA, in conjunction with CANDAR'18), (Hida Takayama, Japan, Nov. 27-30, 2018)
Akane Matsumae, Susumu Matsumae, Yukari Nagai: Dynamic Relationship Design of Knowledge Creating Cluster: Traditional Japanese Architectural Industry, Interdisciplinary Conference on Innovation in Design, Entrepreneurship, and Sustainable Systems (IDEAS 2019), (Jun. 2019)
Quentin Ehkirch, Saya Kakiuchi, Yuki Motomura, Susumu Matsumae, Akane Matsumae: An Attempt to Understand Social Relationships Using Facial Expression Electromyography Analysis, Smart Innovation, Systems and Technologies (Springer Nature) (Jan. 2021)
Susumu Matsumae: Accelerating pipeline implementation of dynamic programming on GPU, the 35th International Conference on Computer Applications in Industry and Engineering (CAINE 2022) (Oct. 2022) * Best Paper Award
Yuta Uehara and Susumu Matsumae: Dimensionality Reduction Using VAE for Deep Reinforcement Learning of Autonomous Driving, International Workshop on Advances in Networking and Computing (WANC, in conjunction with CANDAR'23), (Matsue, Shimane, Japan, Nov. 28-Dec. 1, 2023)
F. Ooshita, S. Matsumae, and T. Masuzawa: Scheduling for Efficient Gather Operation in Heterogeneous Cluster Systems, IEICE Technical Report, COMP2001-78, pp.33-40 (Jan. 2002).
S. Matsumae: An Efficient Scaling-Simulation Algorithm of a Mesh with Separable Buses by a Mesh with Partitioned Buses,IEICE Technical Report, COMP2001-101, pp.63-69 (Mar. 2002).
S. Matsumae: Optimal Simulation of Dynamically Reconfigurable Row/Column Buses by Statically Fixed Buses, IEICE Technical Report, COMP2003-29, pp.41-46 (Aug. 2003).
F. Ooshita, S. Matsumae, and T. Masuzawa: Efficient Gather Operation in Heterogeneous Parallel Computing Environments with Divisible Data, IEICE Technical Report (Nov. 2003).
H. Noda, Y. Sumi, N. Yabuki, S. Matsumae, Y. Fukumoto, T. Ueda, Y. Fukui: Proposal for Multiple methods of Active Net Model, Proceedings of International Symposium on Communications and Information Tech. 2004 (ISCIT 2004), Sapporo, Japan (2004)
H. Noda, Y. Sumi, N. Yabuki, K. Nishigaki, S. Matsumae, Y. Fukumoto, T. Ueda, Y. Fukui: 動的なネットモデルの高密度方式化に関する検討, Record of the 2004 Kansai-section joint convention of institutes of electrical engineering, JAPAN, G336 (2004)
H. Noda, Y. Sumi, N. Yabuki, T. Nakamura, S. Matsumae, Y. Fukumoto, T. Ueda, Y. Fukui: 動的なネットモデルの四面分割に関する検討, Record of the 2004 Kansai-section joint convention of institutes of electrical engineering, JAPAN, G337 (2004)
S. Matsumae and N. Tokura: Simulation Algorithms among Enhanced Mesh Models, Technical Report 99-ICS-1, Department of Informatics and Mathematical Science, Graduate School of Engineering Science, Osaka University (Mar. 1999).
S. Matsumae: Efficient Simulation Algorithms among Processor Arrays with Broadcasting Buses, Doctoral thesis, Graduate School of Engineering Science, Osaka University (Jan. 2000).